CACHE Memory

CACHE (pronounced "CASH")

Cache is used by the processor to reduce the average time to access main memory.
Cache is a smaller, faster memory which stores copies of the data from the most frequently used main memory locations.
When the processor needs to read from or write to a location in main memory, it first checks whether a copy of that data is in the cache.If so, the processor immediately reads from or writes to the cache, which is much faster than reading from or writing to the main memory.

Most CPU's have at least 3 independent caches:
     1. Instruction cache - Speed up executable instructin fetch
     2. Data cache - Speed up data fetch and store
     3. Translation lookaside buffer(TLB) - Speed up virtual-to-physical address translation for both executable instructions and data.

     NOTE: Data cache is organized as a hierarchy of more cache levels - L1,L2 etc.
     NOTE: Cache built into CPU itself is referred to as Level 1(L1) cache.Cache that resides on a separate chip next to the CPU is called Level 2(L2) cache. Some CPUs                 have both L1 & L2 cache built-in and designate the separate cache chip as Level 3(L3) cache.
     NOTE: Cache coherence
                The data in main memory being cached may be changed by other entities (e.g: peripherals usind DMA or multi-core processor), in which case the copy in                     the cache may become out-of-date or stale. 
                Cache coherence protocols should be used for this.

cache hit and cache miss:
      These are just simple terms for the accuracy of what goes into the CPU's cache. If the CPU accesses its cache looking for data it will either find it or it won't. If the CPU finds what's its after that's called a cache hit. If it has to go to main memory to find it then it is called a cache miss. The percentage of hits from the overall cache requests is called the hit rate.

TLB & MMU
    Most CPUs implement some form of virtual memory.
    Each program running on the machine sees its own simplified address space, which contains code and data for that program only. Each program uses this virtual address space without regard for where it exists in physical memory.
    Virtual memory requires the processor to translate virtual addresses generated by the program into physical addresses in main memory. The portin of the processor that does this translation is known as the memory management unit(MMU). The fast path through the MMU can perform those translations stored in the translation lookaside buffer(TLB), which is a cache of mappings from the operating system's page table.

Freescale - i.Mx
Marvel - XScale
Nvidia - Tegra
ST-Ericsson - Nova & NovaThor
Qualcomm - Snapdragon
TI - OMAP
Samsung - Hummingbird
Apple - A4,A5

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#else
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