The ARM processor

ARM has seven basic operating modes:
1. USER: Unprivileged mode under which most tasks run
2. FIQ: Entered when a high priority(fast) interrupt is raised
3. IRQ: Entered when a low priority(normal) interrupt is raised
4. SUPERVISOR: Entered on RESET and when a software interrupt instruction(SWI) is executed.(Protected mode for operating system support)
5. ABORT: Used to handle memory access violations
6. UNDEF: Used to handle undefined instructions
7. SYSTEM: Privileged mode using same registers as user mode
- Except USER mode all other modes are privileged
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T = Thumb instruction set support
D = Debug interface support(JTAG/ICE)
M = Multiplier (clock related)
I = Interrupt (Fast interrupt support)
E = Enhanced DSP instructions
J = Jazelle (Java byte code execution)
S = Synthesizable core
T2= Thumb2 instruction set
Z = TrustZone instructions
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R0 - R12 are general purpose registers
R13 is Stack pointer(SP)
R14 is subroutine link regiser(LR)
R15 is program counter(PC)
CPSR is current program status regiser

NOTE: R0-R3 
    When a function is called the arguments are passed in these registers.
    The return values of a function are also placed in these registers.
    (R0 - for a     32bit value)
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Exceptions have priorities:
Reset (highest priority)
Data Abort
FIQ
IRQ
Prefetch Abort
SWI (Lowest priority)
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